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Feasibility Studies of EEPROM Memory Implementations in VeSTIC Technology

Bartosz Dec, Andrzej Pfitzner. Feasibility Studies of EEPROM Memory Implementations in VeSTIC Technology. In 25th International Conference "Mixed Design of Integrated Circuits and System", MIXDES 2018, Gdynia, Poland, June 21-23, 2018. pages 275-279, IEEE, 2018. [doi]

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Bartosz Dec

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Andrzej Pfitzner

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