Analog multipliers for deep neural net architectures

B. N. Deepashree, S. Raghuram. Analog multipliers for deep neural net architectures. In 2017 International Conference on Advances in Computing, Communications and Informatics, ICACCI 2017, Udupi (Near Mangalore), India, September 13-16, 2017. pages 1638-1642, IEEE, 2017. [doi]

@inproceedings{DeepashreeR17,
  title = {Analog multipliers for deep neural net architectures},
  author = {B. N. Deepashree and S. Raghuram},
  year = {2017},
  doi = {10.1109/ICACCI.2017.8126077},
  url = {https://doi.org/10.1109/ICACCI.2017.8126077},
  researchr = {https://researchr.org/publication/DeepashreeR17},
  cites = {0},
  citedby = {0},
  pages = {1638-1642},
  booktitle = {2017 International Conference on Advances in Computing, Communications and Informatics, ICACCI 2017, Udupi (Near Mangalore), India, September 13-16, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-6367-3},
}