Process variation aware DRAM design using block based adaptive body biasing algorithm

Satyajit Desai, Sanghamitra Roy, Koushik Chakraborty. Process variation aware DRAM design using block based adaptive body biasing algorithm. In Keith A. Bowman, Kamesh V. Gadepally, Pallab Chatterjee, Mark M. Budnik, Lalitha Immaneni, editors, Thirteenth International Symposium on Quality Electronic Design, ISQED 2012, Santa Clara, CA, USA, March 19-21, 2012. pages 255-261, IEEE, 2012. [doi]

Possibly Related Publications

The following publications are possibly variants of this publication: