A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000

Zhixiong Di, Yue Hao, Jiangyi Shi, Peijun Ma. A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000. VLSI Signal Processing, 81(2):227-247, 2015. [doi]

@article{DiHSM15,
  title = {A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000},
  author = {Zhixiong Di and Yue Hao and Jiangyi Shi and Peijun Ma},
  year = {2015},
  doi = {10.1007/s11265-014-0945-5},
  url = {http://dx.doi.org/10.1007/s11265-014-0945-5},
  researchr = {https://researchr.org/publication/DiHSM15},
  cites = {0},
  citedby = {0},
  journal = {VLSI Signal Processing},
  volume = {81},
  number = {2},
  pages = {227-247},
}