RTL implementations and FPGA benchmarking of selected CAESAR Round Two authenticated ciphers

William Diehl, Kris Gaj. RTL implementations and FPGA benchmarking of selected CAESAR Round Two authenticated ciphers. Microprocessors and Microsystems, 52:202-218, 2017. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.