Comparative Study of Test Pattern Generation Systems to Reduce Test Application Time

Patare Snehal Dilip, Geethu Remadevi Somanathan, Ramesh Bhakthavatchalu. Comparative Study of Test Pattern Generation Systems to Reduce Test Application Time. In 9th International Symposium on Embedded Computing and System Design, ISED 2019, Kollam, India, December 13-14, 2019. pages 1-4, IEEE, 2019. [doi]

@inproceedings{DilipSB19,
  title = {Comparative Study of Test Pattern Generation Systems to Reduce Test Application Time},
  author = {Patare Snehal Dilip and Geethu Remadevi Somanathan and Ramesh Bhakthavatchalu},
  year = {2019},
  doi = {10.1109/ISED48680.2019.9096234},
  url = {https://doi.org/10.1109/ISED48680.2019.9096234},
  researchr = {https://researchr.org/publication/DilipSB19},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {9th International Symposium on Embedded Computing and System Design, ISED 2019, Kollam, India, December 13-14, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-4177-0},
}