Pipelined FPGA Adders

Florent de Dinechin, Hong Diep Nguyen, Bogdan Pasca. Pipelined FPGA Adders. In International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy. pages 422-427, IEEE, 2010. [doi]

@inproceedings{DinechinNP10,
  title = {Pipelined FPGA Adders},
  author = {Florent de Dinechin and Hong Diep Nguyen and Bogdan Pasca},
  year = {2010},
  doi = {10.1109/FPL.2010.87},
  url = {http://dx.doi.org/10.1109/FPL.2010.87},
  researchr = {https://researchr.org/publication/DinechinNP10},
  cites = {0},
  citedby = {0},
  pages = {422-427},
  booktitle = {International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy},
  publisher = {IEEE},
}