VLSI design of fast DCTQ-IQIDCT processor for real time image compression

Harish V. Dixit, Amutha Jeyakumar, Piyush S. Kasat, Chirag Warty. VLSI design of fast DCTQ-IQIDCT processor for real time image compression. In Tenth International Conference on Wireless and Optical Communications Networks, WOCN 2013, Bhopal, India, July 26-28, 2013. pages 1-5, IEEE, 2013. [doi]

@inproceedings{DixitJKW13,
  title = {VLSI design of fast DCTQ-IQIDCT processor for real time image compression},
  author = {Harish V. Dixit and Amutha Jeyakumar and Piyush S. Kasat and Chirag Warty},
  year = {2013},
  doi = {10.1109/WOCN.2013.6616258},
  url = {http://dx.doi.org/10.1109/WOCN.2013.6616258},
  researchr = {https://researchr.org/publication/DixitJKW13},
  cites = {0},
  citedby = {0},
  pages = {1-5},
  booktitle = {Tenth International Conference on Wireless and Optical Communications Networks, WOCN 2013, Bhopal, India, July 26-28, 2013},
  publisher = {IEEE},
}