Buffer Planning for 3D ICs

Sheqin Dong, Hongjie Bai, Xianlong Hong, Satoshi Goto. Buffer Planning for 3D ICs. In International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan. pages 1735-1738, IEEE, 2009. [doi]

Authors

Sheqin Dong

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Hongjie Bai

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Xianlong Hong

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Satoshi Goto

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