Transistor channel decomposition for structured analog layout, manufacturability and low-power applications

Qing Dong, Bo Yang 0004, Gong Chen, Jing Li, Shigetoshi Nakatake. Transistor channel decomposition for structured analog layout, manufacturability and low-power applications. In Keith A. Bowman, Kamesh V. Gadepally, Pallab Chatterjee, Mark M. Budnik, Lalitha Immaneni, editors, Thirteenth International Symposium on Quality Electronic Design, ISQED 2012, Santa Clara, CA, USA, March 19-21, 2012. pages 656-662, IEEE, 2012. [doi]

@inproceedings{DongYCLN12,
  title = {Transistor channel decomposition for structured analog layout, manufacturability and low-power applications},
  author = {Qing Dong and Bo Yang 0004 and Gong Chen and Jing Li and Shigetoshi Nakatake},
  year = {2012},
  doi = {10.1109/ISQED.2012.6187562},
  url = {http://dx.doi.org/10.1109/ISQED.2012.6187562},
  researchr = {https://researchr.org/publication/DongYCLN12},
  cites = {0},
  citedby = {0},
  pages = {656-662},
  booktitle = {Thirteenth International Symposium on Quality Electronic Design, ISQED 2012, Santa Clara, CA, USA, March 19-21, 2012},
  editor = {Keith A. Bowman and Kamesh V. Gadepally and Pallab Chatterjee and Mark M. Budnik and Lalitha Immaneni},
  publisher = {IEEE},
  isbn = {978-1-4673-1034-5},
}