C. J. Duanmu. Accelearation of Full-Search Algorithm on SIMD Architectures by Using Eight-Bit Partial Sums of Four Luminance Values. In IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006. pages 1575-1578, IEEE, 2006. [doi]
@inproceedings{Duanmu06,
title = {Accelearation of Full-Search Algorithm on SIMD Architectures by Using Eight-Bit Partial Sums of Four Luminance Values},
author = {C. J. Duanmu},
year = {2006},
doi = {10.1109/APCCAS.2006.342545},
url = {http://dx.doi.org/10.1109/APCCAS.2006.342545},
tags = {architecture, C++, search},
researchr = {https://researchr.org/publication/Duanmu06},
cites = {0},
citedby = {0},
pages = {1575-1578},
booktitle = {IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006},
publisher = {IEEE},
}