A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock

Ramen Dutta, T. K. Bhattacharyya. A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock. In VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009. pages 439-444, IEEE, 2009. [doi]

@inproceedings{DuttaB09,
  title = {A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock},
  author = {Ramen Dutta and T. K. Bhattacharyya},
  year = {2009},
  doi = {10.1109/VLSI.Design.2009.88},
  url = {http://dx.doi.org/10.1109/VLSI.Design.2009.88},
  tags = {architecture},
  researchr = {https://researchr.org/publication/DuttaB09},
  cites = {0},
  citedby = {0},
  pages = {439-444},
  booktitle = {VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009},
  publisher = {IEEE},
  isbn = {978-0-7695-3506-7},
}