Performance Evaluation of RISC-Based Memory-Centric Processor Architecture

Danijela Efnusheva. Performance Evaluation of RISC-Based Memory-Centric Processor Architecture. In Radek Silhavy, editor, Applied Informatics and Cybernetics in Intelligent Systems - Proceedings of the 9th Computer Science On-line Conference 2020, Volume 3. Volume 1226 of Advances in Intelligent Systems and Computing, pages 147-163, Springer, 2020. [doi]

@inproceedings{Efnusheva20,
  title = {Performance Evaluation of RISC-Based Memory-Centric Processor Architecture},
  author = {Danijela Efnusheva},
  year = {2020},
  doi = {10.1007/978-3-030-51974-2_13},
  url = {https://doi.org/10.1007/978-3-030-51974-2_13},
  researchr = {https://researchr.org/publication/Efnusheva20},
  cites = {0},
  citedby = {0},
  pages = {147-163},
  booktitle = {Applied Informatics and Cybernetics in Intelligent Systems - Proceedings of the 9th Computer Science On-line Conference 2020, Volume 3},
  editor = {Radek Silhavy},
  volume = {1226},
  series = {Advances in Intelligent Systems and Computing},
  publisher = {Springer},
  isbn = {978-3-030-51974-2},
}