Enhancing timing-driven FPGA placement for pipelined netlists

Kenneth Eguro, Scott Hauck. Enhancing timing-driven FPGA placement for pipelined netlists. In Limor Fix, editor, Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008. pages 34-37, ACM, 2008. [doi]

@inproceedings{EguroH08:0,
  title = {Enhancing timing-driven FPGA placement for pipelined netlists},
  author = {Kenneth Eguro and Scott Hauck},
  year = {2008},
  doi = {10.1145/1391469.1391480},
  url = {http://doi.acm.org/10.1145/1391469.1391480},
  researchr = {https://researchr.org/publication/EguroH08%3A0},
  cites = {0},
  citedby = {0},
  pages = {34-37},
  booktitle = {Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008},
  editor = {Limor Fix},
  publisher = {ACM},
  isbn = {978-1-60558-115-6},
}