A 1.6ps peak-INL 5.3ns range two-step digital-to-time converter in 65nm CMOS

Ahmed Elmallah, Mostafa Gamal Ahmed, Ahmed Elkholy, Woo-seok Choi, Pavan Kumar Hanumolu. A 1.6ps peak-INL 5.3ns range two-step digital-to-time converter in 65nm CMOS. In 2018 IEEE Custom Integrated Circuits Conference, CICC 2018, San Diego, CA, USA, April 8-11, 2018. pages 1-4, IEEE, 2018. [doi]

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