Fast Floorplanning for FPGAs

John M. Emmert, Akash Randhar, Dinesh Bhatia. Fast Floorplanning for FPGAs. In Reiner W. Hartenstein, Andres Keevallik, editors, Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm, 8th International Workshop, FPL 98, Tallinn, Estonia, August 31 - September 3, 1998, Proceedings. Volume 1482 of Lecture Notes in Computer Science, pages 129-138, Springer, 1998. [doi]

@inproceedings{EmmertRB98,
  title = {Fast Floorplanning for FPGAs},
  author = {John M. Emmert and Akash Randhar and Dinesh Bhatia},
  year = {1998},
  url = {http://springerlink.metapress.com/openurl.asp?genre=article&issn=0302-9743&volume=1482&spage=0129},
  researchr = {https://researchr.org/publication/EmmertRB98},
  cites = {0},
  citedby = {0},
  pages = {129-138},
  booktitle = {Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm, 8th International Workshop, FPL 98, Tallinn, Estonia, August 31 - September 3, 1998, Proceedings},
  editor = {Reiner W. Hartenstein and Andres Keevallik},
  volume = {1482},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-64948-4},
}