Modelling and simulation of off-chip communication architectures for high-speed packet processors

Jacob Engel, Daniel Lacks, Taskin Koçak. Modelling and simulation of off-chip communication architectures for high-speed packet processors. In Vojin G. Oklobdzija, editor, Proceedings of the Third IASTED International Conference on Circuits, Signals, and Systems, Marina del Rey, CA, USA, October 24-26, 2005. pages 169-174, IASTED/ACTA Press, 2005.

Authors

Jacob Engel

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Daniel Lacks

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Taskin Koçak

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