Lenko Erbakanov, Krassimir T. Atanassov, Sotir Sotirov, Stanislav Simeonov. Generalized net models of basic sequential logic circuits. In Ronald R. Yager, Vassil Stoyanov Sgurev, Mincho Hadjiski, Vladimir Simov Jotsov, editors, 8th IEEE International Conference on Intelligent Systems, IS 2016, Sofia, Bulgaria, September 4-6, 2016. pages 579-583, IEEE, 2016. [doi]
@inproceedings{ErbakanovASS16,
title = {Generalized net models of basic sequential logic circuits},
author = {Lenko Erbakanov and Krassimir T. Atanassov and Sotir Sotirov and Stanislav Simeonov},
year = {2016},
doi = {10.1109/IS.2016.7737483},
url = {http://dx.doi.org/10.1109/IS.2016.7737483},
researchr = {https://researchr.org/publication/ErbakanovASS16},
cites = {0},
citedby = {0},
pages = {579-583},
booktitle = {8th IEEE International Conference on Intelligent Systems, IS 2016, Sofia, Bulgaria, September 4-6, 2016},
editor = {Ronald R. Yager and Vassil Stoyanov Sgurev and Mincho Hadjiski and Vladimir Simov Jotsov},
publisher = {IEEE},
isbn = {978-1-5090-1354-8},
}