Christian Fiedler, Franz Josef Preyser, Wolfgang Kastner. Simulation of RPDEVS Models of Logic Gates. Simul. Notes Eur., 29(2):85-91, 2019. [doi]
@article{FiedlerPK19,
title = {Simulation of RPDEVS Models of Logic Gates},
author = {Christian Fiedler and Franz Josef Preyser and Wolfgang Kastner},
year = {2019},
doi = {10.11128/sne.29.tn.10474},
url = {https://doi.org/10.11128/sne.29.tn.10474},
researchr = {https://researchr.org/publication/FiedlerPK19},
cites = {0},
citedby = {0},
journal = {Simul. Notes Eur.},
volume = {29},
number = {2},
pages = {85-91},
}