A cache design for high performance embedded systems

Pierfrancesco Foglia, Daniele Mangano, Cosimo Antonio Prete. A cache design for high performance embedded systems. J. Embedded Computing, 1(4):587-597, 2005. [doi]

@article{FogliaMP05:0,
  title = {A cache design for high performance embedded systems},
  author = {Pierfrancesco Foglia and Daniele Mangano and Cosimo Antonio Prete},
  year = {2005},
  url = {http://iospress.metapress.com/content/6exw2qy0uy9ethg3/},
  tags = {caching, design},
  researchr = {https://researchr.org/publication/FogliaMP05%3A0},
  cites = {0},
  citedby = {0},
  journal = {J. Embedded Computing},
  volume = {1},
  number = {4},
  pages = {587-597},
}