Novel memory hierarchy with e-STT-MRAM for near-future applications

Shinobu Fujita, Hiroki Noguchi, Kazutaka Ikegami, Susumu Takeda, Kumiko Nomura, Keiko Abe. Novel memory hierarchy with e-STT-MRAM for near-future applications. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017. pages 1-2, IEEE, 2017. [doi]

@inproceedings{FujitaNITNA17,
  title = {Novel memory hierarchy with e-STT-MRAM for near-future applications},
  author = {Shinobu Fujita and Hiroki Noguchi and Kazutaka Ikegami and Susumu Takeda and Kumiko Nomura and Keiko Abe},
  year = {2017},
  doi = {10.1109/VLSI-DAT.2017.7939700},
  url = {https://doi.org/10.1109/VLSI-DAT.2017.7939700},
  researchr = {https://researchr.org/publication/FujitaNITNA17},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-3969-2},
}