System Level Power Estimation of System-on-Chip Interconnects in Consideration of Transition Activity and Crosstalk

Martin Gag, Tim Wegner, Dirk Timmermann. System Level Power Estimation of System-on-Chip Interconnects in Consideration of Transition Activity and Crosstalk. In René van Leuken, Gilles Sicard, editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers. Volume 6448 of Lecture Notes in Computer Science, pages 21-30, Springer, 2010. [doi]

@inproceedings{GagWT10,
  title = {System Level Power Estimation of System-on-Chip Interconnects in Consideration of Transition Activity and Crosstalk},
  author = {Martin Gag and Tim Wegner and Dirk Timmermann},
  year = {2010},
  doi = {10.1007/978-3-642-17752-1_3},
  url = {http://dx.doi.org/10.1007/978-3-642-17752-1_3},
  researchr = {https://researchr.org/publication/GagWT10},
  cites = {0},
  citedby = {0},
  pages = {21-30},
  booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers},
  editor = {René van Leuken and Gilles Sicard},
  volume = {6448},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-642-17751-4},
}