A 30-40 GHz fractional-N frequency synthesizer development using a Verilog-A high-level design methodology

George Gal, Omar Abdelfattah, Gordon W. Roberts. A 30-40 GHz fractional-N frequency synthesizer development using a Verilog-A high-level design methodology. In 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012. pages 57-60, IEEE, 2012. [doi]

@inproceedings{GalAR12,
  title = {A 30-40 GHz fractional-N frequency synthesizer development using a Verilog-A high-level design methodology},
  author = {George Gal and Omar Abdelfattah and Gordon W. Roberts},
  year = {2012},
  doi = {10.1109/MWSCAS.2012.6291956},
  url = {https://doi.org/10.1109/MWSCAS.2012.6291956},
  researchr = {https://researchr.org/publication/GalAR12},
  cites = {0},
  citedby = {0},
  pages = {57-60},
  booktitle = {55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-2526-4},
}