A 0.5V Low-Power All-Digital Phase-Locked Loop in 65nm CMOS Process for Wireless Sensing Applications - researchr publication authors

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Fredrick Angelo R. Galapon, Mark Allen D. C. Agaton, Arcel G. Leynes, Lemuel Neil M. Noveno, Anastacia B. Alvarez, Chris Vincent J. Densing, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon, Rico Jossel M. Maestro. A 0.5V Low-Power All-Digital Phase-Locked Loop in 65nm CMOS Process for Wireless Sensing Applications. In TENCON 2018 - 2018 IEEE Region 10 Conference, Jeju, South Korea, October 28-31, 2018. pages 2122-2126, IEEE, 2018. [doi]

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