A scalable evolvable hardware processing array - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Angel Gallego, Javier Mora, Andrés Otero, Eduardo de la Torre, Teresa Riesgo. A scalable evolvable hardware processing array. In 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013, Cancun, Mexico, December 9-11, 2013. pages 1-7, IEEE, 2013. [doi]

This author has not been identified. Look up 'Angel Gallego' in GoogleThis author has not been identified. Look up 'Javier Mora' in GoogleThis author has not been identified. Look up 'Andrés Otero' in GoogleThis author has not been identified. Look up 'Eduardo de la Torre' in GoogleThis author has not been identified. Look up 'Teresa Riesgo' in Google

runs on WebDSL