Analysis of the Effect of LUT Size on FPGA Area and Delay Using Theoretical Derivations

Haixia Gao, Yintang Yang, Xiaohua Ma, Gang Dong. Analysis of the Effect of LUT Size on FPGA Area and Delay Using Theoretical Derivations. In 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA. pages 370-374, IEEE Computer Society, 2005. [doi]

@inproceedings{GaoYMD05a,
  title = {Analysis of the Effect of LUT Size on FPGA Area and Delay Using Theoretical Derivations},
  author = {Haixia Gao and Yintang Yang and Xiaohua Ma and Gang Dong},
  year = {2005},
  doi = {10.1109/ISQED.2005.20},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.20},
  tags = {analysis},
  researchr = {https://researchr.org/publication/GaoYMD05a},
  cites = {0},
  citedby = {0},
  pages = {370-374},
  booktitle = {6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2301-3},
}