A very low-power 8-bit Sigma-Delta converter in a 0.8µm CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 V

Andrea Gerosa, Andrea Neviani. A very low-power 8-bit Sigma-Delta converter in a 0.8µm CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 V. In ISCAS (3). pages 49-52, 2003. [doi]

@inproceedings{GerosaN03,
  title = {A very low-power 8-bit Sigma-Delta converter in a 0.8µm CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 V},
  author = {Andrea Gerosa and Andrea Neviani},
  year = {2003},
  doi = {10.1109/ISCAS.2003.1206172},
  url = {http://dx.doi.org/10.1109/ISCAS.2003.1206172},
  researchr = {https://researchr.org/publication/GerosaN03},
  cites = {0},
  citedby = {0},
  pages = {49-52},
  booktitle = {ISCAS (3)},
}