FPGA-based lock-in amplifier with sub-ppm resolution working up to 6 MHz

Giacomo Gervasoni, Marco Carminati, Giorgio Ferrari. FPGA-based lock-in amplifier with sub-ppm resolution working up to 6 MHz. In 2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016, Monte Carlo, Monaco, December 11-14, 2016. pages 117-120, IEEE, 2016. [doi]

@inproceedings{GervasoniCF16,
  title = {FPGA-based lock-in amplifier with sub-ppm resolution working up to 6 MHz},
  author = {Giacomo Gervasoni and Marco Carminati and Giorgio Ferrari},
  year = {2016},
  doi = {10.1109/ICECS.2016.7841146},
  url = {http://dx.doi.org/10.1109/ICECS.2016.7841146},
  researchr = {https://researchr.org/publication/GervasoniCF16},
  cites = {0},
  citedby = {0},
  pages = {117-120},
  booktitle = {2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016, Monte Carlo, Monaco, December 11-14, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-6113-6},
}