Power and chip-area aware network-on-chip modeling for system on chip simulation - researchr publication authors

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Masoud Oveis Gharan, Gul N. Khan. Power and chip-area aware network-on-chip modeling for system on chip simulation. In Fernando Barros, Kalyan S. Perumalla, Roland Ewald, editors, 7th International ICST Conference on Simulation Tools and Techniques, SIMUTools '14, Lisbon, Portugal, March 17-19, 2014. pages 178-185, ACM, 2014. [doi]

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