Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors - researchr publication authors

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Hamid Reza Ghasemi, Stark C. Draper, Nam Sung Kim. Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors. In 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), February 12-16 2011, San Antonio, Texas, USA. pages 38-49, IEEE Computer Society, 2011. [doi]

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