Aniruddha Ghosh, Satrughna Singha, Amitabha Sinha. A new architecture for FPGA implementation of a MAC unit for digital signal processors using mixed number system. SIGARCH Computer Architecture News, 40(2):33-38, 2012. [doi]
@article{GhoshSS12-0,
title = {A new architecture for FPGA implementation of a MAC unit for digital signal processors using mixed number system},
author = {Aniruddha Ghosh and Satrughna Singha and Amitabha Sinha},
year = {2012},
doi = {10.1145/2234336.2234342},
url = {http://doi.acm.org/10.1145/2234336.2234342},
researchr = {https://researchr.org/publication/GhoshSS12-0},
cites = {0},
citedby = {0},
journal = {SIGARCH Computer Architecture News},
volume = {40},
number = {2},
pages = {33-38},
}