Kevin Gillespie, Harry R. Fair III, Carson Henrion, Ravi Jotwani, Stephen V. Kosonocky, Robert S. Orefice, Donald A. Priore, Jonathan White, Kathryn Wilcox. 5.5 Steamroller: An x86-64 core implemented in 28nm bulk CMOS. In 2014 IEEE International Conference on Solid-State Circuits Conference, ISSCC 2014, Digest of Technical Papers, San Francisco, CA, USA, February 9-13, 2014. pages 104-105, IEEE, 2014. [doi]
@inproceedings{GillespieFHJKOP14,
title = {5.5 Steamroller: An x86-64 core implemented in 28nm bulk CMOS},
author = {Kevin Gillespie and Harry R. Fair III and Carson Henrion and Ravi Jotwani and Stephen V. Kosonocky and Robert S. Orefice and Donald A. Priore and Jonathan White and Kathryn Wilcox},
year = {2014},
doi = {10.1109/ISSCC.2014.6757357},
url = {https://doi.org/10.1109/ISSCC.2014.6757357},
researchr = {https://researchr.org/publication/GillespieFHJKOP14},
cites = {0},
citedby = {0},
pages = {104-105},
booktitle = {2014 IEEE International Conference on Solid-State Circuits Conference, ISSCC 2014, Digest of Technical Papers, San Francisco, CA, USA, February 9-13, 2014},
publisher = {IEEE},
isbn = {978-1-4799-0918-6},
}