Design of a 2D Median Filter with a High Throughput FPGA Implementation

Anish Goel, M. Omair Ahmad, M. N. S. Swamy. Design of a 2D Median Filter with a High Throughput FPGA Implementation. In Hoi Lee, Randall L. Geiger, editors, 62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, Dallas, TX, USA, August 4-7, 2019. pages 1073-1076, IEEE, 2019. [doi]

@inproceedings{GoelAS19,
  title = {Design of a 2D Median Filter with a High Throughput FPGA Implementation},
  author = {Anish Goel and M. Omair Ahmad and M. N. S. Swamy},
  year = {2019},
  doi = {10.1109/MWSCAS.2019.8885009},
  url = {https://doi.org/10.1109/MWSCAS.2019.8885009},
  researchr = {https://researchr.org/publication/GoelAS19},
  cites = {0},
  citedby = {0},
  pages = {1073-1076},
  booktitle = {62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, Dallas, TX, USA, August 4-7, 2019},
  editor = {Hoi Lee and Randall L. Geiger},
  publisher = {IEEE},
  isbn = {978-1-7281-2788-0},
}