Neural Network Implementation in Reprogrammable FPGA Devices - An Example for MLP

Marek Gorgon, Mateusz Wrzesinski. Neural Network Implementation in Reprogrammable FPGA Devices - An Example for MLP. In Leszek Rutkowski, Ryszard Tadeusiewicz, Lotfi A. Zadeh, Jacek M. Zurada, editors, Artificial Intelligence and Soft Computing - ICAISC 2006, 8th International Conference, Zakopane, Poland, June 25-29, 2006, Proceedings. Volume 4029 of Lecture Notes in Computer Science, pages 19-28, Springer, 2006. [doi]

Authors

Marek Gorgon

This author has not been identified. Look up 'Marek Gorgon' in Google

Mateusz Wrzesinski

This author has not been identified. Look up 'Mateusz Wrzesinski' in Google