An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors

Kathryn E. Gray, Gabriel Kerneis, Dominic P. Mulligan, Christopher Pulte, Susmit Sarkar, Peter Sewell. An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors. In Milos Prvulovic, editor, Proceedings of the 48th International Symposium on Microarchitecture, MICRO 2015, Waikiki, HI, USA, December 5-9, 2015. pages 635-646, ACM, 2015. [doi]

@inproceedings{GrayKMPSS15,
  title = {An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors},
  author = {Kathryn E. Gray and Gabriel Kerneis and Dominic P. Mulligan and Christopher Pulte and Susmit Sarkar and Peter Sewell},
  year = {2015},
  doi = {10.1145/2830772.2830775},
  url = {http://doi.acm.org/10.1145/2830772.2830775},
  researchr = {https://researchr.org/publication/GrayKMPSS15},
  cites = {0},
  citedby = {0},
  pages = {635-646},
  booktitle = {Proceedings of the 48th International Symposium on Microarchitecture, MICRO 2015, Waikiki, HI, USA, December 5-9, 2015},
  editor = {Milos Prvulovic},
  publisher = {ACM},
  isbn = {978-1-4503-4034-2},
}