Evaluation of On-Chip Interfaces for Dynamically Reconfigurable Coprocessors

Björn Griese, Boris Kettelhoit, Mario Porrmann. Evaluation of On-Chip Interfaces for Dynamically Reconfigurable Coprocessors. In Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland. pages 214-219, IEEE Computer Society, 2006. [doi]

@inproceedings{GrieseKP06,
  title = {Evaluation of On-Chip Interfaces for Dynamically Reconfigurable Coprocessors},
  author = {Björn Griese and Boris Kettelhoit and Mario Porrmann},
  year = {2006},
  doi = {10.1109/PARELEC.2006.36},
  url = {http://doi.ieeecomputersociety.org/10.1109/PARELEC.2006.36},
  researchr = {https://researchr.org/publication/GrieseKP06},
  cites = {0},
  citedby = {0},
  pages = {214-219},
  booktitle = {Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2554-7},
}