Fault-Tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support

Florian Haas, Sebastian Weis, Theo Ungerer, Gilles Pokam, Youfeng Wu. Fault-Tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support. In Jens Knoop, Wolfgang Karl, Martin Schulz 0001, Koji Inoue, Thilo Pionteck, editors, Architecture of Computing Systems - ARCS 2017 - 30th International Conference, Vienna, Austria, April 3-6, 2017, Proceedings. Volume 10172 of Lecture Notes in Computer Science, pages 16-30, Springer, 2017. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.