A chip solution to hierarchical and boundary-scan compatible board level BIST

Oliver F. Haberl, Thomas Kropf. A chip solution to hierarchical and boundary-scan compatible board level BIST. In Proceedings of the Second Great Lakes Symposium on VLSI, Kalamazoo, MI, USA, February 28-29, 1992. pages 16-21, IEEE, 1992. [doi]

Authors

Oliver F. Haberl

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Thomas Kropf

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