Koutaro Hachiya, Toshiyuki Saito, Toshiyuki Nakata, Norio Tanabe. Enhancement of parallelism for tearing-based circuit simulation. In Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997. pages 493-498, IEEE, 1997. [doi]
@inproceedings{HachiyaSNT97,
title = {Enhancement of parallelism for tearing-based circuit simulation},
author = {Koutaro Hachiya and Toshiyuki Saito and Toshiyuki Nakata and Norio Tanabe},
year = {1997},
doi = {10.1109/ASPDAC.1997.600314},
url = {http://dx.doi.org/10.1109/ASPDAC.1997.600314},
researchr = {https://researchr.org/publication/HachiyaSNT97},
cites = {0},
citedby = {0},
pages = {493-498},
booktitle = {Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997},
publisher = {IEEE},
isbn = {0-7803-3663-1},
}