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Reducing Network Hardware Quantity by Employing Multi-Processor Cluster Structure in Distributed Memory Parallel Processors

Naoki Hamanaka, Junji Nakagoshi, Teruo Tanaka. Reducing Network Hardware Quantity by Employing Multi-Processor Cluster Structure in Distributed Memory Parallel Processors. In Luc Bougé, Michel Cosnard, Yves Robert, Denis Trystram, editors, Parallel Processing: CONPAR 92 - VAPP V, Second Joint International Conference on Vector and Parallel Processing, Lyon, France, September 1-4, 1992, Proceedings. Volume 634 of Lecture Notes in Computer Science, pages 25-30, Springer, 1992.

Authors

Naoki Hamanaka

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Junji Nakagoshi

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Teruo Tanaka

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