A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC

Haolin Han, Shubin Liu, Hongzhi Liang, Yi Shen 0007, Jianyu Guo, Ruili Ren, Zhangming Zhu. A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC. IEEE Trans. Circuits Syst. I Regul. Pap., 71(4):1495-1505, April 2024. [doi]

Authors

Haolin Han

This author has not been identified. Look up 'Haolin Han' in Google

Shubin Liu

This author has not been identified. Look up 'Shubin Liu' in Google

Hongzhi Liang

This author has not been identified. Look up 'Hongzhi Liang' in Google

Yi Shen 0007

This author has not been identified. Look up 'Yi Shen 0007' in Google

Jianyu Guo

This author has not been identified. Look up 'Jianyu Guo' in Google

Ruili Ren

This author has not been identified. Look up 'Ruili Ren' in Google

Zhangming Zhu

This author has not been identified. Look up 'Zhangming Zhu' in Google