Node-Covering Based Defect and Fault Tolerance Methods for Increased Yield in FPGAs

Fran Hanchek, Shantanu Dutt. Node-Covering Based Defect and Fault Tolerance Methods for Increased Yield in FPGAs. In 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India. pages 225-229, IEEE Computer Society, 1996. [doi]

@inproceedings{HanchekD96,
  title = {Node-Covering Based Defect and Fault Tolerance Methods for Increased Yield in FPGAs},
  author = {Fran Hanchek and Shantanu Dutt},
  year = {1996},
  doi = {10.1109/ICVD.1996.489489},
  url = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.489489},
  tags = {rule-based},
  researchr = {https://researchr.org/publication/HanchekD96},
  cites = {0},
  citedby = {0},
  pages = {225-229},
  booktitle = {9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India},
  publisher = {IEEE Computer Society},
}