Shehzad Hasan, Ajoy Kumar Palit, Walter Anheier. Test Pattern Generation and Compaction for Crosstalk Induced Glitches and Delay Faults. In VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010. pages 345-350, IEEE, 2010. [doi]
No references recorded for this publication.
No citations of this publication recorded.