An FPGA-based In-NIC Cache Approach for Lazy Learning Outlier Filtering

Ami Hayashi, Hiroki Matsutani. An FPGA-based In-NIC Cache Approach for Lazy Learning Outlier Filtering. In Igor V. Kotenko, Yiannis Cotronis, Masoud Daneshtalab, editors, 25th Euromicro International Conference on Parallel, Distributed and Network-based Processing, PDP 2017, St. Petersburg, Russia, March 6-8, 2017. pages 15-22, IEEE, 2017. [doi]

@inproceedings{HayashiM17,
  title = {An FPGA-based In-NIC Cache Approach for Lazy Learning Outlier Filtering},
  author = {Ami Hayashi and Hiroki Matsutani},
  year = {2017},
  doi = {10.1109/PDP.2017.48},
  url = {https://doi.org/10.1109/PDP.2017.48},
  researchr = {https://researchr.org/publication/HayashiM17},
  cites = {0},
  citedby = {0},
  pages = {15-22},
  booktitle = {25th Euromicro International Conference on Parallel, Distributed and Network-based Processing, PDP 2017, St. Petersburg, Russia, March 6-8, 2017},
  editor = {Igor V. Kotenko and Yiannis Cotronis and Masoud Daneshtalab},
  publisher = {IEEE},
  isbn = {978-1-5090-6058-0},
}