Yi He, Maolin Guan, Chunyuan Zhang, Tian Tian, Qianming Yang. Fully Distributed On-chip Instruction Memory Design for Stream Architecture Based on Field-Divided VLIW Compression. In Geyong Min, Jia Hu, Lei (Chris) Liu, Laurence Tianruo Yang, Seetharami Seelam, Laurent Lefevre, editors, 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, HPCC-ICESS 2012, Liverpool, United Kingdom, June 25-27, 2012. pages 25-32, IEEE Computer Society, 2012. [doi]
@inproceedings{HeGZTY12,
title = {Fully Distributed On-chip Instruction Memory Design for Stream Architecture Based on Field-Divided VLIW Compression},
author = {Yi He and Maolin Guan and Chunyuan Zhang and Tian Tian and Qianming Yang},
year = {2012},
doi = {10.1109/HPCC.2012.14},
url = {http://doi.ieeecomputersociety.org/10.1109/HPCC.2012.14},
researchr = {https://researchr.org/publication/HeGZTY12},
cites = {0},
citedby = {0},
pages = {25-32},
booktitle = {14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, HPCC-ICESS 2012, Liverpool, United Kingdom, June 25-27, 2012},
editor = {Geyong Min and Jia Hu and Lei (Chris) Liu and Laurence Tianruo Yang and Seetharami Seelam and Laurent Lefevre},
publisher = {IEEE Computer Society},
isbn = {978-1-4673-2164-8},
}