Yifan He, Jinshan Yue, Xiaoyu Feng, Yuxuan Huang, Hongyang Jia, Jingyu Wang, Lu Zhang, Wenyu Sun, Huazhong Yang, Yongpan Liu. An RRAM-Based Digital Computing-in-Memory Macro With Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree. IEEE Trans. Circuits Syst. II Express Briefs, 70(2):416-420, February 2023. [doi]
@article{HeYFHJWZSYL23,
title = {An RRAM-Based Digital Computing-in-Memory Macro With Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree},
author = {Yifan He and Jinshan Yue and Xiaoyu Feng and Yuxuan Huang and Hongyang Jia and Jingyu Wang and Lu Zhang and Wenyu Sun and Huazhong Yang and Yongpan Liu},
year = {2023},
month = {February},
doi = {10.1109/TCSII.2022.3209872},
url = {https://doi.org/10.1109/TCSII.2022.3209872},
researchr = {https://researchr.org/publication/HeYFHJWZSYL23},
cites = {0},
citedby = {0},
journal = {IEEE Trans. Circuits Syst. II Express Briefs},
volume = {70},
number = {2},
pages = {416-420},
}