Andrew D. Hilton, Amir Roth. BOLT: Energy-efficient Out-of-Order Latency-Tolerant execution. In Matthew T. Jacob, Chita R. Das, Pradip Bose, editors, 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 9-14 January 2010, Bangalore, India. pages 1-12, IEEE Computer Society, 2010. [doi]
@inproceedings{HiltonR10,
title = {BOLT: Energy-efficient Out-of-Order Latency-Tolerant execution},
author = {Andrew D. Hilton and Amir Roth},
year = {2010},
doi = {10.1109/HPCA.2010.5416634},
url = {http://dx.doi.org/10.1109/HPCA.2010.5416634},
researchr = {https://researchr.org/publication/HiltonR10},
cites = {0},
citedby = {0},
pages = {1-12},
booktitle = {16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 9-14 January 2010, Bangalore, India},
editor = {Matthew T. Jacob and Chita R. Das and Pradip Bose},
publisher = {IEEE Computer Society},
isbn = {978-1-4244-5659-8},
}