A restricted dynamically reconfigurable architecture for low power processors

Takeshi Hirao, Dahoo Kim, Itaru Hida, Tetsuya Asai, Masato Motomura. A restricted dynamically reconfigurable architecture for low power processors. In 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013, Cancun, Mexico, December 9-11, 2013. pages 1-7, IEEE, 2013. [doi]

Authors

Takeshi Hirao

This author has not been identified. Look up 'Takeshi Hirao' in Google

Dahoo Kim

This author has not been identified. Look up 'Dahoo Kim' in Google

Itaru Hida

This author has not been identified. Look up 'Itaru Hida' in Google

Tetsuya Asai

This author has not been identified. Look up 'Tetsuya Asai' in Google

Masato Motomura

This author has not been identified. Look up 'Masato Motomura' in Google