A Concurrency Control in Hardware Transactional Memory Considering Execution Path Variation

Anju Hirota, Keisuke Mashita, Tomoaki Tsumura. A Concurrency Control in Hardware Transactional Memory Considering Execution Path Variation. In Fourth International Symposium on Computing and Networking, CANDAR 2016, Hiroshima, Japan, November 22-25, 2016. pages 77-83, IEEE, 2016. [doi]

Authors

Anju Hirota

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Keisuke Mashita

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Tomoaki Tsumura

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