Joris van der Hoeven. Multiple Precision Floating-Point Arithmetic on SIMD Processors. In Neil Burgess, Javier D. Bruguera, Florent de Dinechin, editors, 24th IEEE Symposium on Computer Arithmetic, ARITH 2017, London, United Kingdom, July 24-26, 2017. pages 2-9, IEEE Computer Society, 2017. [doi]
@inproceedings{Hoeven17,
title = {Multiple Precision Floating-Point Arithmetic on SIMD Processors},
author = {Joris van der Hoeven},
year = {2017},
doi = {10.1109/ARITH.2017.12},
url = {http://doi.ieeecomputersociety.org/10.1109/ARITH.2017.12},
researchr = {https://researchr.org/publication/Hoeven17},
cites = {0},
citedby = {0},
pages = {2-9},
booktitle = {24th IEEE Symposium on Computer Arithmetic, ARITH 2017, London, United Kingdom, July 24-26, 2017},
editor = {Neil Burgess and Javier D. Bruguera and Florent de Dinechin},
publisher = {IEEE Computer Society},
isbn = {978-1-5386-1965-0},
}